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design of the hardware architecture of circular convolution
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Design of the Hardware Architecture of Circular Convolution:

 

In the present work, we have kept our focus on designing simplified as well as efficient hardware architecture for the purpose of evaluating circular convolution between two input sequences. For the sake of simplicity, we have considered two 4 point input sequences X and Y, i.e. we have assumed N=4. However, the design can be extended to any larger value of N, without any loss of generality. The architecture that has been designed can be subdivided into several modules as illustrated in the following subsections. Each module is dedicated towards performing a pre assigned task.

Let us consider two n-point sequences  and. Their cyclic convolution is in an n-point sequence.