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RESULTS

 

 SIMULATION REPORT

 

 

Fig4.6 Simulation report of 8 bit multiplier

 

 

Fig4.7 Simulation report of 32 bit floating point multiplier

 

CONCLUSION

Here, we have discussed the operation of *-bit multiplier and floating point multiplier. We have utilized the rule of “Urdhva Triyagbhyam” to formulate the design. The simulation report of 8-bit multiplier and floating point multiplier is attached with the document.