**
Design of IC 74181 (4-bit ALU)**

The
main internal features of the 74181 appear in Figure(1.3).The key arithmetic
operation of twos-complement addition is implemented by the carry-lookahead
method. The adder consists of propagate-generate logic feeding a lookahead
circuit that computes carries, and a set of XOR gates that compute the final
sum. The 74181s carry-lookahead generator is the same as that given earlier with
the addition of propagate and generate outputs (denoted *p** *and
** g**)

*F _{i}
= IP_{i } XOR IG_{i} XOR ( IC_{i-1} + M )*

A register-level view of the 74181 4-bit
ALU* *

** for 3> i > 0**, where

*IP _{i}
= A_{i} + B_{i}S_{0} + B_{i}S_{i} *

In
the logic mode of operation, ** M = 1**, so (1.5) becomes

*F _{i}
= IP_{i } XOR (IG_{i})’*

On substituting (1.6), (1.7) into (1.8) and simplifying, we obtain

*F _{i}
= A_{i}’B_{i}S_{0}’ + A_{i}’B_{i}’S_{i}’
+ A_{i}B’S_{2} + A_{i}B_{i}S_{3}*

This
expresses ** F_{i}(A_{i},B_{i})** in sum of
minterms form, with a distinct ( possibly complemented ) select variable
controlling each minterm. It therefore produces a different logic function for
each of the 16 possible combinations of the S variables, and so is essentially
the same as (1.4).Hence with M=1, the 74181 acts as a universal function
generator capable of producing any two variable Boolean function

* F_{i}
= IP_{i } XOR IG_{i} XOR IC_{i-1} * (1.10)

This
has the general form of a sum (or difference) output. We can interpret the
entire output function **F= F _{3}F_{2}F_{1}F_{0}**
more easily using the arithmetic expression

**F **= (*IP*)’ *plus**(IG)’* ** plus** c

which
is implied by when ** M= 1**. Here

**F**
= A ** plus** B

changing
** S** to 0110 produces the twos-complement subtraction

**F**
= A ** minus** B

and effectively reconfigures the ALU.

The
various combinations of S produce a total of 16 different functions in the
arithmetic mode, only a few of which are useful. For example, with ** S**
= 0100, Equation (1.11) becomes

**F
**= 1111 ** plus** 0000

which
is 1111 when c_{in} = 0, that is, the constant minus-one in
twos-complement code. When c_{in} = 1, F changes to 0000, since we are
adding plus-one to minus-one. The ability to generate constants like ± 1 and 0
in this way is useful for implementing some types of instructions.

The 74181s p, g and c_{out}
outputs are intended to allow k copies of the 74181 to be combined either using
ripple-carry propagation or carry-lookahead to form a 4k-bit ALU. Figure 1.4
shows a 16-bit ALU composed of four 74181 stages, with ripple-carry propagation
between stages; compare figure 1.3. Note how the S and M control lines are
shared, while the data lines are separate. Note too that no interstage
connections are needed for the logic operations because of their bitwise,
word-oriented nature. Another interesting feature of the 74181 is its ability
to act as a magnitude comparator in conjunction with the carry output c out.
The electronic circuits driving the 74181s ( A=B ) output are designed so that
when several ( A=B ) lines are wired together as in Figure 1.4, the wired
connection outputs the AND function of all its input signals. In other words,
the overall ( A=B ) output signal is 1 if and only if each 74181 slice produces
( A=B ) = 1. This type of technology-specific connection is called a wired AND.
No extra gates or other “ glue” logic are needed for ripple-carry expansion of
the 74181.