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microcontroller at89c51 details description
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MICROCONTROLLER (AT89C51)

Features

• Compatible with MCS-51™ Products

• 4K Bytes of In-System Reprogrammable Flash Memory

– Endurance: 1,000 Write/Erase Cycles

• Fully Static Operation: 0 Hz to 24 MHz

• Three-level Program Memory Lock

• 128 x 8-bit Internal RAM

• 32 Programmable I/O Lines

• Two 16-bit Timer/Counters

• Six Interrupt Sources

• Programmable Serial Channel

• Low-power Idle and Power-down Modes

 

 

Description

 

The AT89C51 is a low-power, high-performance CMOS 8-bit microcomputer with 4K

bytes of Flash programmable and erasable read only memory (PEROM). The device

is manufactured using Atmel’s high-density nonvolatile memory technology and is

compatible with the industry-standard MCS-51 instruction set and pinout. The on-chip

Flash allows the program memory to be reprogrammed in-system or by a conventional

nonvolatile memory programmer. By combining a versatile 8-bit CPU with Flash

on a monolithic chip, the Atmel AT89C51 is a powerful microcomputer which provides

a highly-flexible and cost-effective solution to many embedded control applications.

 

 

Pin Configurations

 

 

Block diagram

 

 

 

 

 

Pin Description

VCC

Supply voltage.

GND

Ground.

Port 0

Port 0 is an 8-bit open-drain bi-directional I/O port. As an

output port, each pin can sink eight TTL inputs. When 1s

are written to port 0 pins, the pins can be used as highimpedance

inputs. Port 0 may also be configured to be the multiplexed loworder

address/data bus during accesses to external program

and data memory. In this mode P0 has internal

pullups. Port 0 also receives the code bytes during Flash programming,

and outputs the code bytes during program

verification. External pullups are required during program

verification.

Port 1

Port 1 is an 8-bit bi-directional I/O port with internal pullups.

The Port 1 output buffers can sink/source four TTL inputs.

When 1s are written to Port 1 pins they are pulled high by

the internal pullups and can be used as inputs. As inputs,

Port 1 pins that are externally being pulled low will source

current (IIL) because of the internal pullups.

Port 1 also receives the low-order address bytes during

Flash programming and verification.

Port 2

Port 2 is an 8-bit bi-directional I/O port with internal pullups.

The Port 2 output buffers can sink/source four TTL inputs.

When 1s are written to Port 2 pins they are pulled high by

the internal pullups and can be used as inputs.

Port 3

Port 3 is an 8-bit bi-directional I/O port with internal pullups.

The Port 3 output buffers can sink/source four TTL inputs.

When 1s are written to Port 3 pins they are pulled high by

the internal pullups and can be used as inputs. As inputs,

Port 3 pins that are externally being pulled low will source

current (IIL) because of the pullups.

Port 3 also serves the functions of various special features

of the AT89C51 as listed below:

Port 3 also receives some control signals for Flash programming

and verification.

RST

Reset input. A high on this pin for two machine cycles while

the oscillator is running resets the device.

ALE/PROG

Address Latch Enable output pulse for latching the low byte

of the address during accesses to external memory. This

pin is also the program pulse input (PROG) during Flash

programming.

In normal operation ALE is emitted at a constant rate of 1/6

the oscillator frequency, and may be used for external timing

or clocking purposes. Note, however, that one ALE

 

Port Pin Alternate Functions

 

 

pulse is skipped during each access to external Data

Memory. If desired, ALE operation can be disabled by setting bit 0 of

SFR location 8EH. With the bit set, ALE is active only during

a MOVX or MOVC instruction. Otherwise, the pin is

weakly pulled high. Setting the ALE-disable bit has no

effect if the microcontroller is in external execution mode.

 

 

 

 

 

PSEN

Program Store Enable is the read strobe to external program

memory.

When the AT89C51 is executing code from external program

memory, PSEN is activated twice each machine

cycle, except that two PSEN activations are skipped during

each access to external data memory.

EA/VPP

External Access Enable. EA must be strapped to GND in

order to enable the device to fetch code from external program

memory locations starting at 0000H up to FFFFH.

Note, however, that if lock bit 1 is programmed, EA will be

internally latched on reset.

EA should be strapped to VCC for internal program

executions.

This pin also receives the 12-volt programming enable voltage

(VPP) during Flash programming, for parts that require

12-volt VPP.

XTAL1

Input to the inverting oscillator amplifier and input to the

internal clock operating circuit.

XTAL2

Output from the inverting oscillator amplifier.

 

 

Oscillator Characteristics

XTAL1 and XTAL2 are the input and output, respectively,

of an inverting amplifier which can be configured for use as

an on-chip oscillator, as shown in Figure 1. Either a quartz

crystal or ceramic resonator may be used. To drive the

device from an external clock source, XTAL2 should be left

unconnected while XTAL1 is driven as shown in Figure 2.

There are no requirements on the duty cycle of the external

clock signal, since the input to the internal clocking circuitry

is through a divide-by-two flip-flop, but minimum and maximum

voltage high and low time specifications must be

observed.